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1 5320a?image?04/03 main features ? high sensitivity full frame ccd sensor ? 2300 x 3500 resolution with 10 m square pixels ? bayer color mosaic ? 12-bit dynamic range ? very low noise: 65 db snr ? binning and roi modes ? lvds or cameralink data format (base configuration) ? high data rate: 25 mpixels/s ? flexible and easy to operate via rs-232 control ? trigger mode: free run or external trigger modes ? binning 2 x 2 and 4 x 4, up to 5 roi ? exposure time ? gain: -5 to 29 db by steps of 0.04 db ? offset: 0 to 255 lsb ? white balance adjustment ? test pattern generation ? single power supply: 24v dc ? high reliability ? ce and fcc compliant ? f (nikon) mount adapter (lens not supplied) product description this camera is designed to meet high performance and quality requirements while providing ease of use. ? atmel manages the entire process, from the sensor to the camera. the result is a camera able to work in 12 bits, with dedicated electronics that provides excellent signal to noise ratio. ? high sensitivity and excellent color reproduction. ? the programmable settings let the user work with different integration times, gains and offsets. the external trigger allows the user to synchronize the camera on an external event while the hardware white balance adjustment avoids subsequent software processing. applications the performance and reliability of this camera make it well suited for the most demanding applications such as film and document scanning, semiconductor and pcb inspection, dna analysis, metrology, x-ray imaging, etc... color 8 megapixels lvds and cameralink ? digital cameras CAMELIA c1 lv 8m CAMELIA c1 cl 8m preliminary rev. 5320a?image?04/03
2 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 improvements the CAMELIA 8m has been redesigned: ? to add new features: ? gain: 928 steps from -5 to 29 db ? offset: 0 to 255 lsb ? test pattern: ramps up from 0 to 2298 pixel values on each line ? white balance: by separate gain adjustment for the 4 colors of the 2 x 2 bayer mosaic ? to improve the electro-optical performances, in particular by: ? reducing power consumption from 8.5w down to 5.5w, using a new front panel and internal heat sink. this lowers the ccd temperature by 5 c thus decreasing the magnitude of ?white pixels?. ? decreasing the typical temporal noise from 2.7 to 2.4 lsb ? implementing new color filter ? to interface with more standard and cheaper cables ? to improve reliability ? CAMELIA c1 8m is ce and fcc compliant what changes for the user? ? new additional commands for gain, offset and test pattern ? rs-232 transmission speed increased from 9600 to 19200 bauds for lvds cameras (9600 bauds for cameralink cameras) ? interface connectors: ? data & sync is a 3m mdr connector with better availability, the same pinout but different mechanics ? rs-232 is a d-sub 9 female for full-duplex transmission ? the power supply connector has a camera standard pinout ? ttl control is a new d-sub 9 male connector avoiding the use of a y cable ? new rear panel (see position of connectors) ? increased sensitivity: blue x3.5, green x3, red x5 at 3200k on 400 to 700 nm
3 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 imaging system description figure 1. lvds camera imaging system figure 2. cameralink camera imaging system
4 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 the CAMELIA camera is powered by a single + 24v power supply. it is configurable via the serial port of the computer (by using either commcam software or standard rs-232 communicator as tty or hyperterminal) for lsd cameras. CAMELIA is configurable via the serial communication of cameralink for cameralink cameras. it also can send digi- tal video. as CAMELIA's ccd is a full frame sensor, the user must use either pulsed lighting or a chopper/shutter in front of the camera in order to have only incident lighting on the ccd during integration time. the user must design an electro-optical interface to drive the camera, the shutter/chopper or lighting by using the shutter signal delivered by the camera. if required, the system can send an external trigger or external itc (integration time control signal) to the camera. the bg38 filter is essential to achieve a correct white balance on color cameras and for use with standard optics (for achromaticity purpose). note that the following elements are not provided by atmel: ? shutter (lcd or mechanical) ? bg38 (anti-infra red) filter ? control box ? lens ? light source ? +24v power supply ?computer for a complete explanation of the utility of the bg38 filter and the shutter, please con- sult the associated faq and the sample images on the atmel?s "camera documentation & software" cd-rom.
5 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 ccd description image format 35.0 mm (v) x 23.0 mm (h) figure 3. sensor organization note: the camera does not output to the 16 dark references. active pixels pixel geometry pixel pitch is 10 m x 10 m. figure 4. filter mosaic (bayer pattern) note: the first active pixel of first active line is blue. mpp photosensitive zone output register 16 dark references 3500 lines 2300 columns table 1. active pixels mode (set via serial com) image size (h x v) timing diagram correspondence no binning 2300 x 3500 h = m v = n 2 x 2 pixel binning 1150 x 1750 4 x 4 pixel binning 574 x 875 first column g r g r b g b g g r g r first line b g b g
6 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 antiblooming by clocking antiblooming can be activated or inhibited (see ?serial communication? on page 13): ? antiblooming off: antiblooming inhibited. this position is recommended if antiblooming is not required for the application. ? antiblooming on: antiblooming activated. ? when binning is disabled, the antiblooming is typically efficient up to 8 times saturation light. camera specifications lsb (least significant bit): 12-bit corresponds to 4095 lsb. absolute maximum ratings storage temperature: -20 to +70 c operating temperature: 0 to +50 c operating humidity (non condensing): < 80% at +35 c vibration: 2 g sinusoidal, from 10 to 100 hz power supply: +20 to +28v weight ? camera with f mount ring: 1400 g ? camera without f mount ring: 1200 g
7 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 electro-optical performance conditions: ? camera operating at ambient temperature: 20 c. ? camera operating in binning 1 x 1 mode and nominal gain 0 db (g = 173). notes: 1. full scale value vpe: maximum digital video signal 2. temporal noise vn: rms value in darkness; measured by subtracting 2 images, pixel to pixel, at 40 ms of integration time 3. this parameter depends on integration time and on the ccd temperature. thermal noise doubles with every increase of 16 c temperature. dark signal doubles with every increase of 8 c temperature. but a internal clamp can correct the mean value of this phenomena. 4. dark signal non-uniformity: rms value; excludes blemishes 5. dynamic range dy = vpe/vn measured at 40 ms of integration time 6. responsitivity conditions: 3200k, with bg38 2 mm, light source powered between 400 and 700 nm, measured on the sensor 7. resolution conditions: video = 2000 lsb and red light source used 8. antiblooming on and integration time = 100 ms 9. measured at 24v table 2. electro-optical performance parameter symbol typical value unit full scale value (1) vpe 4095 lsb temporal noise (2)(3) vn 2.4 lsb dark signal non-uniformity (3)(4) dsnu 2 lsb.s dynamic range (5) dy 1700 64.6 db responsivity (6) r-blue r-green r-red 6.24 5.99 7.85 lsb/(nj/cm 2 ) responsivity (6) r-blue r-green r-red 1760 1690 2220 lsb/(lux.s) resolution (7) horizontal transfer function at nyquist vertical contrast transfer function at nyquist ctfh ctfv 20% 20% ? ? antiblooming (over illumination capability) (8) ? 8x ? electrons to lsb conversion ? 15 e-/lsb current consumption (9) i 230 ma
8 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 spectral responsivity figure 5. spectral responsivity image grade specification ? defect sizes ? blemish: 1 x 1 defect ? cluster: blemish grouping of not more than a given number of adjacent defects: 1 x 1 < cluster 1 size 2 x 2 2 x 2 < cluster 2 size 5 x 5 ? column: one-pixel-wide column with more than 7 contiguous defective pixels ? defect separation: defects are separated by no less than d min pixels in any direction ? defects in darkness ? blemish or cluster: pixel(s) whose signal deviate(s) more than 150 lsb ? column: column whose signal deviates more than 15 lsb ? defects under illumination ? blemish or cluster: pixel(s) that deviate(s) by more than +20% or -30% from the average pixel ? column: column which deviates by more than 10% from the average column defect test conditions ? room temperature = 20 c ? integration time in darkness = 100 ms ? camera operating in binning 1 x 1 mode ? light source: halogen 3200k with bg38 (2 mm thick) ir cut- off with f/11 aperture ? test under illumination at 50% saturation level ? no software correction performed 0 4 2 8 6 12 10 14 16 400 450 500 550 700 600 650 responsivity (lsb/nj/cm 2 ) responsivity at gnom wavelength (nm) blue green red note: nj/cm 2 measured on the sensor
9 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 classifications ccd window specification ? thickness = 1.2 mm 0.05 ? glass index at 588 nm: n = 1.5255 ? admitted defects rate: 0 inclusions > 10 m ? transmittance > 98% in the range of 400-700 nm ? transmittance > 82% in the range of 700-1000 nm ? flatness of the ccd window < 100 um (concave) ? flatness of the ccd chip must be within 30 m table 3. image grade classifications grade blemishes cluster 1 cluster 2 column total d min total d min total d min total d min e 500 3 30 50 6 100 5 150 h 300 3 10 50 0 ? 0 ?
10 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 camera features regions of interest (roi ) caution : this function has been available since october 2001 starting with camera s/n: 01321093. for older cameras, these commands aren?t available and can corrupt the eeprom (see ?camera identification? on page 15). CAMELIA 8m can operate in multi roi mode, allowing masking of regions of the image and thus increasing frame rate by a reduced readout time. the user defines up to 5 windows to be masked. in addition the starting and ending addresses for each window can be specified. time reduction: about 92 s per masked line. two steps (under serial communication): ? enter the list of starting and ending addresses with the command: y=ssss/eeee/ssss/eeee/?/eeee/ ? enter the number of regions masked with the command: f=x (x=0 to 5) rules the line addresses must be a multiple of 4 (to be compliant with the binning). the image starts at line 0 and ends at line 3499 and the smallest area consists of 4 lines. the commands must be send in the following order: ?y=?? then ?f=??. for fgt software users, the user has to resize the number of lines in the fgt settings. example in order to mask 3 regions in the wafer image defined as follows: ? the first 304 lines at the top of the image (blue background) ? 748 lines in the center of the image (two center lines of the wafer) ? the last 304 lines of the image (blue background): ? "y=0/304/1376/2124/3196/3499/" ?"f=3" in this example readout time will be reduced by 1356 lines which are equivalent to 125 ms. figure 6. readout time
11 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 gain & offset video signal processing gain and offset can be adjusted by setting the gain and the off- set via serial communication: ? gain adjusted from -5.1 to 28.9 db: g = code 0 to 928 ? nominal gain (factory configuration) is 0 db: g = code 173 ? offset adjusted from 0 to 255 lsb: o = code 0 to 255 ? gain is applied to the video signal before the addition of offset antiblooming by clocking antiblooming can be activated or inhibited (set via serial communication): ? antiblooming off: this position is recommended if antiblooming is not required for the application. ? antiblooming on: antiblooming is activated and is effective up to 8 times the saturation level of the sensor. test pattern in normal mode, the digital video signal fr om the ccd sensor is available at the lvds output interface. for test purpose a fixed digital pattern is generated and can be available instead of the video signal at the lvds output interface. the digital pattern is ramped up from 0 to 2298 lsb code (line width); each line pre- sents the same pattern: this is useful to validate the connection to the acquisition system before adjustment operations relative to image capture. selection is set by the test pattern generation command: ? ccd sensor : m = 0 ? test pattern : m = 1
12 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 color gain adjustment the CAMELIA 8m color allows the user to adjust the white balance with on board pro- grammable gains. this function provides separate gain adjustment for the four color pixels of the 2 x 2 bayer mosaic. gain is applied to the analog signal. the four gains are individually programmable by serial communication between -2 and 10 db by steps of 0.2 db. the gain curve is linear through 63 steps between -2 and 10 db. table 4. color gain definition color command red x = code 0 to 63 green (red) w = code 0 to 63 green (blue) v = code 0 to 63 blue u = code 0 to 63 table 5. gain value in db gain code gain value in db 63 10 db 31 4 db 0 -2 db
13 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 serial communication serial configuration the camera configuration is set by an rs-232 or cameralink serial interface. the rs-232 configuration is: ? full duplex/without handshaking (the camera is configured in dce/modem) ? 19200 baud, 8-bit data, no parity bit, 1 stop bit the cameralink configuration is: ? 9600 baud, 8-bit data, no parity bit, 1 stop bit serial commands the following features are available: table 6. serial commands function serial configuration comment serial command timing mode 3 modes: - continuous (free running) - external trigger - external itc t=0 t=1 t=2 binning 3 modes: - no binning - 2 x 2 pixel binning - 4 x 4 pixel binning image size: 2300 (h) x 3500 (v) image size: 1150 (h) x 1750 (v) image size: 574 (h) x 875 (v) b=0 b=1 b=2 gain range from: - g = 5.1 db - g = 28.9 db steps of around 37 mdb (gain curve is not fully linear) g=0 g=928 offset range from: - 0 lsb - 255 lsb steps of 1 lsb o=0 o=255 blue gain range from: - u = -2 db - u = 10 db steps of around 0.19 db (gain curve is fully linear) u=0 u=63 green (blue) gain range from: - v = -2 db - v = 10 db steps of around 0.19 db (gain curve is fully linear) v=0 v=63 green (red) gain range from: - w = -2 db - w = 10 db steps of around 0.19 db (gain curve is fully linear) w=0 w=63 red gain range from: - x = -2 db - x = 10 db steps of around 0.19 db (gain curve is fully linear) x=0 x=63
14 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 note: roi commands have been available since october 2001 starting with camera s/n: 01321093. for older cameras, these commands aren?t available and can corrupt the eeprom. if in doubt, please contact our hotline before using roi function (see ?camera identification? on page 15). shutter 3 modes: - inactive (always open) - active - inactive (always closed) s=0 s=1 s=2 shutter delay 4 positions: - 1 ms - 10 ms - 20 ms - 40 ms d=0 d=1 d=2 d=3 antiblooming control 2 modes: - active - inactive a=0 a=1 integration time integration time value in ms from 1 to 2000 ms must be an integer ex: 120 for 120 ms ex: i=120 roi: number of windows 0 to 5 windows ex: f=2 roi: windows addresses line start/line stop ? must be an integer divisible by 4 line stop >3 first line = 0; last line = 3499 ex: y=1824/2252/ 3156/3499/ test pattern generation m=0: sensor image m=1: pattern image to check power, transmission... m=0 m=1 special commands camera identification readout user camera identification readout software version readout camera configuration readout current camera configuration record default camera configuration restoration !=0 !=1 !=2 !=3 !=4 !=5 user camera id $= string of char writing and record of the user camera identification $= table 6. serial commands (continued) function serial configuration comment serial command
15 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 command syntax ? valid syntax is: s=n(cr) where: ? s: command identification (s is a single character in upper case) ? n: setting value ? (cr): means "carriage return" (ascii code = 13) ? no spaces, nor tabs may be inserted between s, =, n and (cr) ? for the CAMELIA 8m only, each address value is followed by ?/?: y=ssss/eeee/?.eeee/ ? example of a valid command: i=500(cr) (sets the integration time to 500 ms) ? example of non valid commands: ? i=500(cr): no space ? i=500(cr): i instead of i ? i=3000(cr): 3000 is out of range ? y=ssss/eeee/sssseeee/: a ?/? is missing settings validation new settings are clocked and become valid for the camera at the end of the readout phase. this means that new settings written before the end of readout of image n will be used for image n+1. new settings written after the readout of image n and before the end of readout of image n+1 will be used for image n+2. camera identification a character string stored in the eeprom contains the product model, its version and its serial number. example: camel_col_8m_lv_01_9851002 stands for: CAMELIA c1 8m lv, version 01, serial number 9851002 it is read by sending: !=0(cr) the serial number is detailed as follows: figure 7. serial number customer identification customer identification is a character string (25 characters max). ? it is set and stored in the eeprom by sending $=xx..xx ? it is read by sending !=1(cr) reading firmware version when receiving !=2(cr) the camera returns the version of the firmware. reading current settings when receiving !=3(cr) the camera returns its current settings. 98 51 002 year number in the week week in the year
16 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 storing the current configuration when receiving !=4(cr) the camera stores the current configuration in the eeprom. factory configuration when receiving !=5(cr), the camera sends back its factory configured settings: a=0(cr) g=173(cr) u=0(cr) v=0(cr) w=0(cr) x=0(cr) o=16(cr) s=1(cr) b=0(cr) t=0(cr) i=0100(cr) d=2(cr) m=0(cr) f=0(cr) (yis not set) >ok(cr)
17 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 timing 2 x 2 and 4 x 4 pixel binning can be used to enable previewing modes. the preview mode is only available in black and white, otherwise the user has to use overlay mode (correction and software lut are not applicable on displayed images). lvds camera timing three timing modes are available: continuous , external triggered and integration time control (itc). the signals in the following drawings are described in table 8: notes: 1. signal present on both connectors. 2. pixel is defined as valid (part of the frame) when both len and fen signals are at a low level. 3. the maximum latency (called td) after of 1 readout line time defined below depends on the binning mode. in binning 1 x 1 mode, this delay is around 104 s. 4. minimum time at high level of the len signal is 10 s (transfer time between two lines). 5. minimum time at high level of the fen signal is 4 lines readout time (around 416 s). 6. shutter delay is adjustable via commcam or rs-232 commands (1, 5, 10 or 20 ms). table 7. timing mode mode frame readout time line readout time max frame rate no binning b=0 370 ms 104 s 2.67 f/s 2 x 2 pixel binning b=1 200 ms 114 s 4.91 f/s 4 x 4 pixel binning b=2 110 ms 134 s 8.82 f/s table 8. lvds frame timing signal name description cam. in/out data & sync pins ttl control pins len line enable low state active when pixel is part of line out 26/27 ? fen frame enable low state active when lines are part of frame out 3/4 ? shutter shutter sync external shutter trig output signal (high level active) out 21/22 (1) 1 (1) trig trigger external trigger input signal (rising edge) in 46/47 (1) 2 (1) itc integration time control external itc input signal (falling/rising edges) in 46/47 (1) 2 (1) pck pixel clock internal master data clock signal at 25 mhz out 1/2 ?
18 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 continuous: t=0 the camera delivers frames continuously: ? frame n+1 integration starts as soon as frame n readout has been completed. ? integration time is set by rs-232. ? video lines (before and after valid frame) are 4 + 4 for binning 1 x 1 (and also 1 + 1 for binning 4 x 4). figure 8. lvds continuous timing diagram operation with external trigger: t=1 integration start is controlled by the user by the external signal trig: ? the rising edge of trig activates the start of frame integration. this rising edge is synchronized by the camera with a latency of td (time delay equivalent to a readout time for a line: see notes in table 8 on page 17). ? integration time is set by rs-232. ? note: the trig signal period must be greater than the sum of the integration time and frame readout time. ? video lines (before and after valid frame) are 4 + 4 for binning 1 x 1 (and also 1 + 1 for binning 4 x 4). figure 9. lvds external trigger timing diagram len frame integration time set by rs-232 ... ... ... ... ... ... ... ... ... ... ... ... video lines line 1 line 2 line n-1 line n video lines m pixels shutter delay 2 ms fen shutter frame readout len trig frame integration time set by rs-232 video lines line 1 line 2 line n-1 line n video lines m pixels td shutter delay waiting frame readout fen shutter ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ...
19 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 operation with integration time control: t=2 integration is fully controlled by the user by the external signal itc: ? the falling edge of itc activates the start of frame integration. this falling edge is synchronized by the camera with a latency of td (time delay equivalent to a readout time for a line: see notes in table 8 on page 17). ? the rising edge of itc activates the stop of frame integration. this rising edge is synchronized by the camera with the same latency as td. ? note: the itc signal period must be greater than the sum of the integration time (defined by itc low) and frame readout time. ? video lines (before and after valid frame) are 4 + 4 for binning 1 x 1 (and also 1 + 1 for binning 4 x 4). figure 10. lvds integration time control timing diagram line timing ? duty cycle of the pck is 50% ? rising and falling edges: 1.5 ns ? pixel clock pck and data rate are: 25 mhz in binning mode 1 x 1, 12.5 mhz in binning mode 2 x 2 and 6.25 mhz in binning mode 4 x 4 ? minimum setup time of data, len and fen, to the rising edge of pck: 10 ns ? minimum hold time of data, len and fen, after the rising edge of pck: 10 ns figure 11. lvds line timing diagram len itc frame integration time set by rs-232 ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... video lines line 1 line 2 line n-1 line n video lines m pixels td td shutter delay waiting frame readout fen shutter len pck ... ... ... ... data 1st valid pixel last valid pixel
20 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 cameralink camera timing three timing modes are available: continuous , external triggered and integration time control (itc). the signals in the following drawings are described in table 9: notes: 1. signal present on both connectors. 2. pixel is defined as valid (part of the frame) when both lval and fval signals are at a high level. 3. the maximum latency (td) of 1 readout line time defined below depends on the bin- ning mode. in binning 1 x 1 mode, this delay is around 104 s. 4. minimum time at low level of lval signal is 10 s (transfer time between two lines). 5. minimum time at low level of fval signal is 4 lines readout time (around 416 s). 6. shutter delay is adjustable via serial communication commands (1, 5, 10 or 20 ms). continuous: t=0 the camera delivers frames continuously: ? frame n+1 integration starts as soon as frame n readout has been completed. ? integration time is set by serial communication. ? video lines (before and after valid frame) are 4 + 4 for binning 1 x 1 (and also 1 + 1 for binning 4 x 4). figure 12. cameralink continuous timing diagram table 9. cameralink frame timing signal name description cam. in/out camera link connector ttl control connector lval line valid high state active when pixel is part of line out yes no fval frame valid high state active when lines are part of frame out yes no shutter shutter sync external shutter trig output sig. (high level active) out no pin 1 trig trigger external trigger input signal (rising edge) in cc1+/ cc1- (1) pin 2 (1) itc integration time control external itc input signal (falling/rising edges) in cc1+/ cc1- (1) pin 2 (1) pck pixel clock internal master data clock signal at 25 mhz out yes no len frame integration time set by rs-232 video lines line 1 line 2 line n-1 line n video lines m pixels shutter delay 2 ms fen shutter ... ... ... ... ... ... ... ... ... ... ... ... frame readout
21 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 operation with external trigger: t=1 integration start is controlled by the user with the external signal trig: ? the rising edge of trig activates the start of frame integration. this rising edge is synchronized by the camera with a latency of td (time delay equivalent to a readout time for a line: see notes in table 9 on page 20). ? integration time is set by serial communication. ? note: the trig signal period must be greater than the sum of the integration time and frame readout time. ? video lines (before and after valid frame) are 4 + 4 for binning 1 x 1 (and also 1 + 1 for binning 4 x 4). figure 13. cameralink external trigger timing diagram operation with integration time control: t=2 integration is fully controlled by the user with the external signal itc: ? the falling edge of itc activates the start of frame integration. this falling edge is synchronized by the camera with a latency of td (time delay equivalent to a readout time for a line: see notes in table 9 on page 20). ? the rising edge of itc activates the stop of the frame integration. this rising edge is synchronized by the camera with the same latency of td. ? note: the itc signal period must be greater than the sum of the integration time (defined by itc low) and frame readout time. ? video lines (before and after valid frame) are 4 + 4 for binning 1 x 1 (and also 1 + 1 for binning 4 x 4). figure 14. cameralink integration time control timing diagram len trig frame integration time set by rs-232 video lines line 1 line 2 line n-1 line n video lines m pixels td shutter delay waiting frame readout fen shutter ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... len itc frame integration time set by rs-232 video lines line 1 line 2 line n-1 line n video lines m pixels td td shutter delay waiting frame readout fen shutter ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ...
22 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 line timing ? duty cycle of the pck is 50% ? pck clock rate is 25 mhz ? data rate (internal pixel clock) is 25 mhz in binning mode 1 x 1 ? mode binning 1 x 1: ? data rate is 25 mhz ? dval always in high state figure 15. cameralink line timing diagram for binning 1 x 1 ? mode binning 2 x 2 (and 4 x 4): ? data rate is 12.5 mhz (or 6.25 mhz) figure 16. cameralink line timing diagram for binning 2 x 2 (and 4 x 4) len ... ... ... ... pck data 1st valid pixel last valid pixel len pck dval data ... ... ... ... ... 1st valid pixel last valid pixel
23 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 electrical interfaces data & sync and ttl control for lvds camera note: 1. lvds (low voltage differential signal): eia 644 standard. all digital i/os are differential: (signal+, signal-). specifications are given for signal +. lvds drivers/receivers: ? manufacturer ns ? driver: ds90lvo47atmtc (so16 package) ? receiver: ds90lvo48atmtc (so16 package) table 10. specifications symbol i/o definition level trig_itc i timing control: - trig_itc is either an external trigger or integration time control (itc) depending on the timing mode configured via rs-232. operation with external trigger: - trig_itc = trig operation with itc: - trig_itc = itc - trig_itc is synchronized by the camera line clock (jitter: 104 s) lvds (1) and ttl pdata(11..0) o digital video output: 12-bit lvds fen o frame enable: - fen = 0: frame data valid: active lines - fen = 1: frame data not valid lvds len o line enable: - len = 0: line data valid: active pixels - len = 1: line data not valid lvds pck o pixel clock lvds shutter o shutter open/close: - shutter open = 1 - shutter closed = 0 delay between the falling edge of shutter and the start of readout: - 4 positions: 1, 10, 20 or 40 ms (set via rs-232) lvds and ttl
24 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 data & sync cabling 50-pin connector: ? connector reference on camera: 3m 10250-6212jl (or 3m 10250-6212vc) ? mating connector on cable side: 3m 10150-6000el; shell: 3m 10350-a200-00 ? we recommend using a twisted pair shielded cable. note: nc: not connected table 11. pinout pin number signal i/o pin number signal i/o 1 pck+ o 26 len+ o 2 pck- o 27 len- o 3 fen+ o 28 do not connect o 4 fen- o 29 do not connect o 5 do not connect o 30 ground o 6 do not connect o 31 ground o 7 pdata0+ o 32 pdata1+ o 8 pdata0- o 33 pdata1- o 9 pdata2+ o 34 pdata3+ o 10 pdata2- o 35 pdata3- o 11 pdata4+ o 36 pdata5+ o 12 pdata4- o 37 pdata5- o 13 pdata6+ o 38 pdata7+ o 14 pdata6- o 39 pdata7- o 15 pdata8+ o 40 pdata9+ o 16 pdata8- o 41 pdata9- o 17 pdata10+ o 42 pdata11+ o 18 pdata10- o 43 pdata11- o 19 ground ? 44 nc ? 20 ground ? 45 nc ? 21 shutter+ o 46 trig_itc+ i 22 shutter- o 47 trig_itc- i 23 do not connect i 48 do not connect i 24 do not connect i 49 do not connect i 25 nc ? 50 nc ?
25 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 ttl control cabling the connector on the camera is d-sub 9 pins male. notes: 1. trig-itc is provided by the data & sync (mdr50) connector in lvds format or by the ttl control connector; the two different signals are logically ?anded? as follows: trig-itc from lvds and trig-itc from ttl. the inputs left open are inter- nally tied to a high level. 2. the shutter output is available on both data & sync and ttl output connectors. table 12. pinout pin number at camera output signal direction 1 shutter out 2 trig-itc in 3 do not connect in 4 do not connect in 5 nc ? 6 nc ? 7 do not connect out 8 do not connect out 9 ground ?
26 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 cameralink and ttl control for cameralink camera notes: 1. trig_itc signal is connected on cc1 differential inputs 2. lvds (low voltage differential signal): eia 644 standard all digital i/os are differential: (signal+, signal-). specifications are given for signal +. cameralink drivers/receivers: ? driver: ns ds90cr285mtd (so56 package) ? receiver: ns ds90lvo48atmtc (so16 package) table 13. specifications symbol i/o definition level trig_itc (1) i timing control: - trig_itc is either an external trigger or integration time control (itc) depending on the timing mode configured via serial communication. operation with external trigger: - trig_itc = trig operation with itc: - trig_itc = itc - trig_itc is synchronized by the camera line clock (jitter: 104 s) lvds (2) and ttl pdata(11..0) o digital video output: 12-bit lvds fval o frame enable: - fval = 1: frame data valid: active lines - fval = 0: frame data not valid lvds lval o line enable: - lval = 1: line data valid: active pixels - lval = 0: line data not valid lvds dval o data strobe: - dval = 1: pixel data valid - dval = 0: pixel data not valid lvds pck o pixel clock lvds shutter o shutter open/close: - shutter open = 1 - shutter closed = 0 delay between the falling edge of shutter and the start of readout: - 4 positions: 1, 10, 20 or 40 ms (set via serial communication) ttl
27 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 cameralink cabling 26-pin connector: ? connector reference on camera: 3m 10226-2210ve ? we recommend using a cameralink standard shielded cable such as the 3m 14x26-szlb-xxx-0lc. note: nc: not connected table 14. pinout pin number signal i/o pin number signal i/o 1 ground ? 14 ground ? 2 x0- o 15 x0+ o 3 x1- o 16 x1+ o 4 x2- o 17 x2+ o 5 xclk- o 18 xclk+ o 6 x3- o 19 x3+ o 7 sertc+ i 20 sertc- i 8 sertfg- o 21 sertfg+ o 9 cc1- i 22 cc1+ i 10 cc2+ i 23 cc2- i 11 cc3- i 24 cc3+ i 12 cc4+ i 25 cc4- i 13 ground ? 26 ground ?
28 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 ttl control cabling the connector on the camera is d-sub 9 pins male. notes: 1. trig-itc is provided by the data & sync (mdr26) connector in lvds format or by the ttl control connector; the two different signals are logically ?anded? as follows: trig-itc from lvds and trig-itc from ttl. the inputs left open are inter- nally tied to a high level. rs-232 for lvds camera ? on camera side: d-sub 9 pins female ? on computer side: dsub9 male, pinout compatible with computer serial port ? note: the cable to be used is a straight pin to pin male-female notes: 1. nc: not connected 2. pin 7 and 8 are internally shorted. table 15. pinout pin number at camera output signal direction 1 shutter out 2 trig-itc in 3 do not connect in 4 do not connect in 5 nc ? 6 nc ? 7 do not connect out 8 do not connect out 9 ground ? table 16. pinout pin number at camera output signal 1 nc 2 tx 3 rx 4 nc 5 ground 6 nc 7 nc 8 nc 9 nc
29 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 power supply specifications cabling ? camera connector type: hirose hr10a-7r-6pb (male) ? cable connector type: hirose hr10a-7p-6s (female) note: nc: not connected figure 17. receptacle viewed from behind the camera caution : power supply cabling is fully compatible with atmel?s aviiva linescan cam- eras. the cabling is not compatible with old CAMELIA 8m. an internal 1a fuse protects the camera against high currents. an internal diode protects the camera against cabling inversion. kits of cable ? lvds-fgt: fgt frame grabber color + data & sync for fgt frame grabber (length 3 meters) + power supply (length 10 meters, open on power supply side) + rs-232 (length 3 meters) ? cameralink: cameralink (length 5 meters) + power supply (length 10 meters, open on power supply side) ? connectors lvds: 3m mdr 50 + hr10a-7p-6s + d-sub9 male table 17. power supply specifications parameter nominal value min value max value voltage +24v +20v +28v current 0.23a 0.26a 0.20a table 18. pinout pin number signal pin number signal 1 pwr 4 gnd 2 nc 5 nc 3 pwr 6 gnd 1 2 3 6 5 4
30 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 mechanical interface lvds camera with f mount ring figure 18. with f mount ring front panel rear panel first pixel first line lvds data & sync dc 24v 110.5 mm rs-232 ttl control 114 mm 144.5 mm 108 mm 2 x 1/4 ? 20 unc 2b 25.6 mm 74 0.1 mm 37 0.2mm 5 0.3 mm 64 0.2 mm 26 0.3 mm 112 mm 64 0.2 mm 2 x ? 2h7 4 x m3 4 mm 46.5 mm factory adjusted ? 66 mm 6 0.2 mm // 0.3
31 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 lvds camera without f mount ring figure 19. without f mount ring first pixel first line 114 mm 108 mm 2 x 1/4 ? 20 unc 2b 25.6 mm 74 0.1 mm 37 0.2 mm 5 0.3 mm 64 0.2 mm 8.9 0.45 mm 6.9 0.6 mm 26 0.3 mm 6 0.2 mm 2 x ? 2h7 4 x m3 4 mm ? 66 mm ? 56 0.1 mm m 51 - 5 h pas 0.75 64 0.2 mm // 0.3 front panel rear panel lvds data & sync dc 24v 110.5 mm rs-232 ttl control 112 mm
32 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 cameralink camera with f mount ring figure 20. with f mount ring front panel rear panel first pixel first line cameralink dc 24v 110.5 mm ttl control 114 mm 144.5 mm 108 mm 2 x 1/4 ? 20 unc 2b 25.6 mm 74 0.1 mm 37 0.2 mm 5 0.3 mm 64 0.2 mm 26 0.3 mm 112 mm 64 0.2 mm 2 x ? 2h7 4 x m3 4 mm 46.5 mm factory adjusted ? 66 mm 6 0.2 mm // 0.3
33 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 cameralink camera without f mount ring figure 21. without f mount ring first pixel first line 114 mm 108 mm 2 x 1/4 ? 20 unc 2b 25.6 mm 74 0.1 mm 37 0.2 mm 5 0.3 mm 64 0.2 mm 8.9 0.45 mm 6.9 0.6 mm 26 0.3 mm 6 0.2 mm 2 x ? 2h7 4 x m3 4 mm ? 66 mm ? 56 0.1 mm m 51 - 5 h pas 0.75 64 0.2 mm // 0.3 front panel rear panel dc 24v 110.5 mm ttl control 112 mm cameralink
34 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 mechanical mounting references ? position in the x, y plan: ? the center pixel of the ccd sensor is positioned within a circle centered on the optical axis and with a diameter of 0.35 mm. the optical axis is defined by the mechanical thread for the optical adapter. ? the center pixel of the ccd sensor is referenced to the two needles on the front panel with a tolerance of 0.125 mm. ? position in the z plan: ? for cameras delivered with an f mount ring, the distance from the ccd sensor plan to the nikon mount is adjusted in factory at 46.5 mm. ? for cameras delivered without the f mount ring, the distance from the ccd sensor plan to the front plan of the thread is 8.9 0.45 mm. ? tilt around the z axis: ? all the pixels of the ccd sensor are located between two plans, perpendicular to the optical axis and separated by a maximum distance of 0.26 mm.
35 CAMELIA c1 8m lvds and cameralink cameras 5320a?image?04/03 standard conformity the cameras have been tested in the following conditions: ? camera with complete atmel housing ? shielded power supply cable ? shielded and twisted pair data transfer cable ? ttl control cable ? linear ac-dc power supply we recommend using the same configurati on to ensure compliance with the following standards. ce conformity the CAMELIA camera complies with the european directive 89/336/cee (en55022 a/cispr22, en55024). class a of en55022 is obtained without condition. class b of en55022 is obtained with ferrite beads on the data/sync and ttl control cables. fcc conformity the CAMELIA camera complies with part 15 of fcc rules. operation is subject to the following two conditions: 1. this device may not cause harmful interference, and 2. this device must accept any interference received, including interference that may cause undesired operation. this equipment has been tested and found to comply with the limits for a class a digital device, pursuant to part 15 of the fcc rules. these limits are designed to provide rea- sonable protection against harmful interference when the equipment is operated in a commercial environment. this equipment generates, uses, and can radiate radio fre- quency energy and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications. operation of this equipment in a residential area is likely to cause harmful in terference in which case the user will be required to correct the interference at his own expense. warning : changes or modifications to this unit not expressly approved by the party responsible for compliance could void the user's authority to operate this equipment. ordering information table 19. ordering code part number description at71xc1lv8mfercb0 CAMELIA 8m c1 lvds grade e with housing and f-mount at71xc1lv8mferca0 CAMELIA 8m c1 lvds grade e with housing and no f-mount at71xc1lv8mferaa0 CAMELIA 8m c1 lvds grade e without mechanics at71xc1cl8mfercb0 CAMELIA 8m c1 cameralink grade e with housing and f-mount at71xc1cl8mferca0 CAMELIA 8m c1 cameralink grade e with housing and no f-mount at71xc1cl8mferaa0 CAMELIA 8m c1 cameralink grade e without mechanics at71-lv-p2c1d1c2 lvds-fgt kit (see ?kits of cable? on page 29) at71-lv-p8c8d8a0 set of lvds connectors (see ?kits of cable? on page 29) at71-cl-p2c0d3a0 cl kit (see ?kits of cable? on page 29)
printed on recycled paper. disclaimer: atmel corporation makes no warranty for the use of its product s, other than those expressly contained in the company?s standar d warranty which is detailed in atmel?s terms and conditions locat ed on the company?s web site. the company assumes no responsibi lity for any errors which may appear in this document, reserves the right to change devices or spec ifications detailed herein at any time wi thout notice, and does not make any commitment to update the information contained her ein. no licenses to patents or other intellectual property of atmel are granted by the company in connection with the sale of atmel produc ts, expressly or by implication. atmel?s products are not aut horized for use as critical components in life support devices or systems. atmel corporation atmel operations 2325 orchard parkway san jose, ca 95131 tel: 1(408) 441-0311 fax: 1(408) 487-2600 regional headquarters europe atmel sarl route des arsenaux 41 case postale 80 ch-1705 fribourg switzerland tel: (41) 26-426-5555 fax: (41) 26-426-5500 asia room 1219 chinachem golden plaza 77 mody road tsimshatsui east kowloon hong kong tel: (852) 2721-9778 fax: (852) 2722-1369 japan 9f, tonetsu shinkawa bldg. 1-24-8 shinkawa chuo-ku, tokyo 104-0033 japan tel: (81) 3-3523-3551 fax: (81) 3-3523-7581 memory 2325 orchard parkway san jose, ca 95131 tel: 1(408) 441-0311 fax: 1(408) 436-4314 microcontrollers 2325 orchard parkway san jose, ca 95131 tel: 1(408) 441-0311 fax: 1(408) 436-4314 la chantrerie bp 70602 44306 nantes cedex 3, france tel: (33) 2-40-18-18-18 fax: (33) 2-40-18-19-60 asic/assp/smart cards zone industrielle 13106 rousset cedex, france tel: (33) 4-42-53-60-00 fax: (33) 4-42-53-60-01 1150 east cheyenne mtn. blvd. colorado springs, co 80906 tel: 1(719) 576-3300 fax: 1(719) 540-1759 scottish enterprise technology park maxwell building east kilbride g75 0qr, scotland tel: (44) 1355-803-000 fax: (44) 1355-242-743 rf/automotive theresienstrasse 2 postfach 3535 74025 heilbronn, germany tel: (49) 71-31-67-0 fax: (49) 71-31-67-2340 1150 east cheyenne mtn. blvd. colorado springs, co 80906 tel: 1(719) 576-3300 fax: 1(719) 540-1759 biometrics/imaging/hi-rel mpu/ high speed converters/rf datacom avenue de rochepleine bp 123 38521 saint-egreve cedex, france tel: (33) 4-76-58-30-00 fax: (33) 4-76-58-34-80 e-mail literature@atmel.com web site http://www.atmel.com 5320a?image?04/03 0m ? atmel corporation 2003 . all rights reserved. atmel ? is a registered trademark, and cameralink ? and CAMELIA ? are the trademarks of atmel corporation or its subsidiaries. other terms and product names may be the trademarks of others.

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